Networks-on-Chip (NoCs), for on-die communication between cores, are important in enabling scalable performance as the number of cores and intellectual property (IP) blocks increases in multi-core processors. In such instances, communication between components becomes the key power and performance limiter. NoCs enable efficient sharing of on-chip wiring resources for communication with routers to control and arbitrate the flow of data between communicating components. Hybrid packet/circuit-switched NoCs enable high throughput and utilization of packet-switching with energy efficiency approaching circuit-switched data propagation.
On-chip interconnect is a key performance and power limiter for applications running on NoCs. Many applications such as media streaming and on-line gaming require limits on latency and a guaranteed minimum throughput to achieve high quality of service. NoCs should deliver these performance requirements with low area and energy overheads.
Like reference numbers and designations in the various drawings indicate like elements.